On VLSI and ULSI semiconductor chips, Al and alloys of Al are used for conventional chip wiring material. The incorporation of Cu and alloys of Cu as a chip wiring material results in improved chip performance and superior reliability when compared to Al and alloys of Al. However, Cu must be successfully isolated from the devices formed in the silicon substrate below and from the surrounding back end of the line (BEOL) insulators. To accomplish this isolation i.e. to prevent diffusion of Cu, a thin liner material is deposited on the patterned BEOL insulator, e.g. trenches formed in the Damascene process, or unpatterned insulator e.g. Cu reactive ion etching (RIE) or through mask Cu deposition process before the Cu is deposited. The thin film liner must also serve as adhesion layer to adhere the copper to the surrounding dielectric. Adhesion of copper directly to most insulators is generally poor.
TiN has been evaluated as a Cu barrier and has been reported in the literature as a barrier for Cu interconnects in SiO.sub.2. In a publication by S-Q Wang, MRS Bulletin 19, 30, (1994) entitled "Barriers against copper diffusion into silicon and drift through silicon dioxide", various barrier systems including TiN are shown for placement between Si/SiO.sub.2 and Cu. TiN has good adhesion to SiO.sub.2. However, Cu adheres poorly to TiN. A very thin glue or adhesion layer of Ti may be used to enhance the adhesion of Cu to TiN; however, this Ti layer drastically degrades the conductivity of the copper film during subsequent thermal processing. In addition, TiN has been known to form a corrosion couple with copper in certain copper polishing slurries used in chemical mechanical polishing (CMP).
Unlike TiN, pure or oxygen-doped Ta adheres poorly to some insulators such as SiO.sub.2. It also forms the high-resistivity beta-phase Ta when deposited directly on the insulator. Furthermore, the Cu barrier properties of Ta fail when it is in contact with Al at moderate temperatures. See for example, the publication by C. -K Hu et al., Proc. VLSI Multilevel Interconn. Conf. 181, (1986) which described an investigation of diffusion barriers to Cu wherein tantalum, silicon nitride and titanium nitride were found to be the good diffusion barriers to Cu. It is reported that oxygen in the Ta films may have inhibited Cu diffusion.
In a publication by L. A. Clevenger et al., J. Appl. Phys. 73, 300 (1993), the effects of deposition pressure, in situ oxygen dosing at the Cu/Ta interface, hydrogen and oxygen contamination and microstructure on diffusion barrier failure temperatures for HV and UHV electron-beam deposited Ta thin films penetrated by Cu were investigated.
Ta.sub.2 N has been proposed as a good copper diffusion barrier, but its adhesion to BEOL insulators and copper is relatively poor. In contrast, the adhesion of TaN (N.sup.18 50%) is adequate, while the adhesion of Cu to TaN is poor. A thin Ta layer can be used to enhance the adhesion of Cu to TaN, without the Ta degrading the performance of Cu BEOL. Such a dual-component liner has been previously disclosed in U.S. Pat. No. 5,281,485 Jan. 25, 1994 to E. G. Colgan and P. M. Fryer. However, the resistivity of this Ta(N) is at least 1200 Micro Ohm-cm, which leads to larger vias or stud resistances, and the inability of the metal liner to act as a redundant current strap or path.
For deep-submicron vias (e.g. less than 0.5 um wide) with .sup..about. 250 .ANG. liner at the bottom, the series resistance of the above Ta-based liners is in the range from 1 to 5 Ohms. By contrast, the copper stud resistance would be less than 10% of the Ta based liner. Although these via resistances compare very favorably with those of Al(Cu)/W-stud values, it is desirable to reduce them below the 1 Ohm range.